Gabriel Leonard Weisz CoRAM++: Supporting Data-Structure-Specific Memory Interface in FPGA Computing Degree Type: Ph.D. in Computer Science Advisor(s): James Hoe Graduated: December 2015 Abstract: FPGAs offer high performance and power efficient computation, but are difficult to use. In particular, the effort involved in managing data movements between on-chip computation components and off-chip DRAM has prevented FPGAs from being widely adopted by the computing industry. Recently developed FPGA programming environments layer simplifying abstractions on top of the DRAM interfaces provided by FPGA vendors, but existing programming environments have primarily focused on support for simple, regular data access patterns such as block copy and streaming. This thesis proposes CoRAM++, an FPGA programming environment that efficiently supports complex data structures such as multi-dimensional arrays and linked lists in addition to simple data access patterns. CoRAM++ application developers manage data movements through an extensible library of data-structure-specific application-level interfaces, which generate specialized soft-logic datapaths between application components and memory. This extensible library of data-structure-specific application-level interfaces is layered top of a system interface which allows library components to attach modules directly to a memory interface in order to lower the latency of irregular, pointer chasing operations. Our evaluation of CoRAM++ shows that this approach can provide convenient data access to a variety of data structures without introducing undue performance or resource overheads, which should make CoRAM++ attractive to FPGA application developers. Thesis Committee: James C. Hoe (Chair) Kayvon Fatahalian Kenneth Mai Todd Mowry Joel S. Emer (MIT/NVIDIA) Frank Pfenning, Head, Computer Science Department Andrew W. Moore, Dean, School of Computer Science Keywords: Computer Architecture, Reconfigurable Computing, FPGA Computing, Decoupled Computing, Development Environments, FPGA, Hardware Specialization, Data-Structure Libraries, FPGA Abstraction, FPGA Design Methodology CMU-CS-15-135.pdf (6.3 MB) ( 182 pages) Copyright Notice