Doctoral Thesis Proposal - Zhengyao Lin

April 29, 2026  2:00PM—3:30PM

Location:
Newell-Simon 1305 and Zoom

Speaker:
ZHENGYAO LIN, Ph.D. Student, Computer Science Department, Carnegie Mellon University
https://zhengyao.page/

Verifying Asynchronous Dataflow Compilers

The paradigm of asynchronous dataflow circuits, in which parallel operators are dynamically scheduled and data-driven, unlocks substantial energy efficiency and performance gains in reconfigurable dataflow architectures (RDAs) and dynamic high-level synthesis (HLS) toolchains. A key challenge hindering their mainstream adoption is the difficulty of correct, efficient, and general-purpose compilation towards asynchronous dataflow.

In this proposal, I present my efforts to apply formal verification to asynchronous dataflow, with the goal of developing an end-to-end, provably correct dataflow compilation pipeline.

Thesis Committee:
Bryan Parno (Chair)
Stephanie Balzer
Ruben Martins
Brandon Lucia
Milijana Surbatovich (University of Maryland, College Park)

Additional Information

In-person and Zoom

Contact
Matt Stewart

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